Software - Tiny CPU - Spec
This CPU consists of a program counter (PC), three registers (A, B, and C) and 256 bytes of memory.
Instructions are one byte, with additional bytes to specify operands when needed. Instructions may have a target and a source specified in them.
| code | operand |
|---|---|
| 0 | A |
| 1 | B |
| 2 | C |
| 3 | mem[next byte] |
The operand code of 3 indicates that the next byte will be read after the instruction and the memory byte at that address will be used. If both operands require another byte to be read, the first byte will specify the target and the next will specify the source.
| code | operation | notes |
|---|---|---|
| 00010001 | JMP J | set PC to J |
| 00100001 | SCP | set mem[A] to mem[B] and increment A and B |
| 01TT0001 | MVL T | set T to the literal value in the next byte |
| 10TT0001 | CAL T J | set mem[T] to PC then set PC to J |
| 11TT0001 | RET T | set PC to mem[T] |
| SSTT0010 | MOV T S | copy the value at S to T |
| SSTT0011 | MFR T S | set T to mem[S] (move from reference) |
| SSTT0100 | MTR T S | set mem[T] to S (move to reference) |
| SSTT0101 | JEQ T S J | if T==S set PC to J |
| SSTT0110 | JNE T S J | if T!=S set PC to J |
| SSTT0111 | JLT T S J | if T<S set PC to J (signed) |
| SSTT1000 | ADD T S | set T to T+A |
| SSTT1001 | SUB T S | set T to T-A |
| SSTT1010 | MUL T S | set T to T*A (signed) |
| SSTT1011 | DIV T S | set T to T/A (signed) |
| SSTT1100 | MOD T S | set T to T%A (signed) |
| SSTT1101 | AND T S | set T to the bitwise and of T and S |
| SSTT1110 | OR T S | set T to the bitwise and of T or S |
| SSTT1111 | XOR T S | set T to the bitwise and of T xor S |
Jump operations that require an address J will read the byte to be used for A after the instruction and and operand bytes it requires.
The CPU outputs to an 8 x 4 character screen that is mapped into memory starting at address 0.
When the CPU is started the user's code is loaded into memory starting at address 0x20 (32), PC is set to 0x20 (32) and execution begins.